C- BASED RAPID PROTOTYPING FOR DIGITAL SIGNAL PROCESSING (ThuPmOR7)

Author(s) : Bertrand Le Gal (LESTER Laboratory - UBS University, France) Emmanuel Casseau (LESTER Laboratory - UBS University, France) Sylvain Huet (LESTER Laboratory - UBS University, France) Pierre Bomel (LESTER Laboratory - UBS University, France) Christophe Jego (ENST Bretagne, France) Eric Martin (LESTER Laboratory - UBS University, France)

Abstract : The increasingly demanding requirements of digital signal processing applications like multimedia, new generations of wireless systems, etc. led to the definition of more and more complex algorithms and systems that are to be efficiently implemented with the time to market constraint. Today, the electronic system design community is mainly concerned with defining efficient System-on-a-Chip (SoC) design methodologies in order to benefit from the high integration capabilities of current ASIC and FPGA technologies on the one hand, and manage the increasing algorithmic complexity of applications on the other hand. Rapid prototyping is considered as a key to speed up the system design. In this context, we have introduced a novel methodology that efficiently addresses both the algorithmic complexity and the high flexibility required by the various application profiles. Our methodology benefits from the emerging High-Level Synthesis (HLS) tools in a platform-based approach dedicated to rapid prototyping. This technique has been successfully applied to the design of a DVB-DSNG standard compliant receiver and can be easily extended to many DSP dataflow applications.

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