DESIGN AND IMPLEMENTATION OF A NEW PERSIAN DIGITS OCR ALGORITHM ON FPGA CHIPS (MonAmOR4)

Author(s) : Navid Toosizadeh (Shahid Beheshti University, Iran) Mohammad Eshghi (Shahid Beheshti University, Iran)

Abstract : An algorithm and a hardware system for a fast and accurate optical recognition of Persian digits are presented. The method presented in this paper is mostly based on recognition using vertical and horizontal projections of Persian digits, along with other characteristics of them. The presented method makes recognition of Persian digits fast with 0% error. Since, at this stage the main goal is designing an algorithm suitable for hardware implementation, a single size font is considered. To implement the algorithm of Persian digits OCR, VHDL codes were used, compiled and fitted in a proper FPGA. The system combines a number of modules for which, VHDL codes were developed. The algorithm was implemented on a special FPGA family from Altera Company, namely Strarix. The design can be easily migrated into other similar FPGAs. The font size and type is flexible. Different font types and sizes could be used to train the system. The hardware resources used for this system are small when compared to available resources of modern FPGAs (8.22% of the total logic cells of the Stratix10). The speed for this real time system is high (21 MHz for processing each row of the digit matrix) and could be improved using faster hardware methods, i.e. ASIC.

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